By J. Bhasker

With this booklet, you can:
- commence writing synthesizable Verilog types quickly.
- See what constructs are supported for synthesis and the way those map to for you to get the specified logic.
- study options to assist keep away from having sensible mismatches.
- instantly commence utilizing the various versions for common components defined in your personal use or alter those in your personal program.

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Additional info for Verilog HDL Synthesis A Practical Primer

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NG — Strobe inputs I X , I X — E x p a n d e r inputs 1Y 1G Υ 1X 0 0 0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 0 1 1 1 2Y 1 1 1 1Y 1 0 0 0 1 0 1 U = 1A + 1B + 1 C+ 1D 2G U 2Y 0 0 1 1 0 1 0 1 1 1 1 0 U = 2A + 2B + 2 C + 2 D Function tables. Function diagram. DO 1 A D1 1 Β D2 1 C ιχ 1 X D3 1 D 1 X Γχ 1/2-'60 1/2D4 D5 D6 D7 1Β 1 Y Example of logic-function expansion using the 7423 and 7460 devices. Pinout (top view) for DIP and FP packages. COMMERCIAL GRADE VERSION DEVICE PACKAGE STYLE IDENTIFICATION DIP SO PLCC LCC TTL TECHNOLOGY 16 7423 '23 1 A FP INDUSTRIAL GRADE VERSION PACKAGE STYLE DEVICE IDENTIFICATION DIP SO PLCC LCC TTL TECHNOLOGY 16 5423 FP 16 Available types and packages.

Logic table. • • • • • • • Vcc 4B 4A 4Y 3B 3A 3Y Pinout (top view) for DIP, SO and FP packages. COMMERCIAL GRADE VERSIONS DEVICE PACKAGE STYLE IDENTIFICATION DIP SO PLCC LCC 7426 74L26 74LS26 TTL TECHNOLOGY 14 14 14 14 FP INDUSTRIAL GRADE VERSIONS DEVICE PACKAGE STYLE IDENTIFICATION DIP SO PLCC LCC 5426 54L26 54LS26 TTL TECHNOLOGY 14 14 14 FP 14 Available types and packages. 37 NOR Gate (54/74)27 Triple 3-input Pin Description nA, wB, nC — Data inputs A Β 1A 1Y c 0 0 0 1 0 0 1 0 0 1 0 0 1C 0 1 1 0 2A 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0 1B 2Y 2B 2C 3A nY — Data outputs Y 3Y 3B 3C Y=A+B+C Logic table.

1A [ • 4Y 1B [ • 4B 2Y [ 2A [ 2B [ GND Pinout (top view) for DIP, SO, and FP packages. 7428 74ALS28 74LS28 SO PLCC LCC TTL TECHNOLOGY 14 14 14 20 14 14 ^2 4 A 3Y ^2 8 ~Ι 3B 3A Pinout (top view) for PLCC and LCC packages. INDUSTRIAL GRADE VERSIONS PACKAGE STYLE DIP 14 Π COMMERCIAL GRADE VERSIONS DEVICE IDENTIFICATION ^2 V c c 1Y FP DEVICE IDENTIFICATION 5428 54ALS28 54LS28 PACKAGE STYLE DIP SO PLCC LCC TTL TECHNOLOGY 14 14 14 14 FP 14 20 20 14 Available types and packages. 39 (54/74)30 • NAND Gate 8-input Pin Description A through Η — Data inputs A Β c A Β C D Ε F G Η Υ 0 X X X X χ χ χ X 0 X X X χ χ χ 1 X X 0 X X χ χ χ X X X 0 X χ χ χ 1 X X X X 0 χ χ χ X X X X X 0 χ χ 1 X X X X X χ 0 χ X X X X X χ χ 0 1 1 0 1 1 1 1 1 1 Y —Data output 1 1 1 1 1 Υ =ABCDEFGH Logic diagram.

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